Assuming the machine model of Example 10.6 (as in Exercise 10.3.2): a) Draw the data dependence graph for the code of Fig. 10.11. b) What are all the critical paths in your graph from part (a)? ! c)...

Assuming the machine model of Example 10.6 (as in Exercise 10.3.2):


a) Draw the data dependence graph for the code of Fig. 10.11.


b) What are all the critical paths in your graph from part (a)?


! c) Assuming unlimited MEM resources, what are all the possible schedules for the seven instructions?

Exercise 10.3.2

Assume a machine with one ALU resource (for the ADD and SUB operations) and one MEM resource (for the LD and ST operations). Assume that all operations require one clock, except for the LD, which requires two. However, as in Example 10.6, a ST on the same memory location can commence one clock after a LD on that location commences. Find a shortest schedule for each of the fragments in Fig. 10.10.

Example 10.6

Fig. 10.10

Fig. 10.11