Assume that an 8-bit resistor-string D/A converter with digital decoding (see Fig. 16.3) has a total resistor-string resistance of , that its pass transistors have an on resistance of , and that the drain-source capacitances to ground of its pass transistors are . Ignoring all other effects and using the zero-value time-constant approach, estimate the worst-case settling time to 0.1 percent.
Already registered? Login
Not Account? Sign up
Enter your email address to reset your password
Back to Login? Click here