Advanced considerations1 indicate that reducing the 741 op amp’s input-stage transconductance offers certain benefi ts, such as a slew rate increase and a reduction in the required value of the on-chip compensation capacitance (these issues will be addressed in Chapters 6 and 7). As we know, a common way to reduce transconductance is by adding suitable degeneration resistors in series with the emitters of Q3 and Q4. However, resistors are undesirable in IC technology, so a clever technique to lower transconductance is to rob Q3 and Q4 of collector current by fabricating each BJT with a double collector, and tying the extra collectors in the manner depicted in where the original collectors are labeled as A and the extra ones as B. (This also results in simpler input-stage circuitry, as the collectors of Q1 and Q are now tied directly to VCC.) (a) Assuming Fn is very large, and the A and B collectors are fabricated with equal areas, fi nd I1 so that we still have IC1 5 IC2 5 9.5 A. What is the required value of R4 in the Widlar sink of Fig. 5.4? What is of the new value of the input-stage transconductance Gm1 ? (b) Repeat if the areas of the B collectors are fabricated three times as large as the areas of the A collectors.
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