(a) Shown in Fig. P6.58 are three CMOS inverters connected to form a ring. Sketch v1, v2, and v3 vs. time (for simplicity assume approximately triangular waveforms), and verify that the circuit...

(a) Shown in Fig. P6.58 are three CMOS inverters connected to form a ring. Sketch v1, v2, and v3 vs. time (for simplicity assume approximately triangular waveforms), and verify that the circuit oscillates (hence the name ring oscillator). Find a relationship between the frequency of oscillation fosc and the average propagation delay tP of each gate. (b) What happens if a fourth inverter is inserted in the loop? What if the number of inverters is fi ve? What conclusions do you draw? (c) If it is found that loading the gates with three external capacitances C1 5 C2 5 C3 5 2 pF as shown in shaded form causes fosc to drop from 300 MHz to 100 MHz, estimate the net stray capacitance Cstray of each node as well as the average current supplied by each gate to charge/ discharge Cstray during consecutive half periods. (d) Estimate the frequency of oscillation if the circuit drives an external 5-pF capacitive load connected to v3. Compare with PSpice and comment.