A PowerPoint is also needed (2) slide Instructions for this are under concept map. Please see attachment requesting if information provided can be revised for each interactive assignment to be combined into one final paper.
The Final Project is a culmination of what you have learned in the course. You learned how computer components are put together as a system to achieve a specific result. For this assignment, you will refine your concept map, and in a paper, you will revise the related discussions you created throughout the course. Prior to beginning work on this final project, please review the required readings in Weeks 1 to 5. You must also use a minimum of three Scholarly, Peer Reviewed, and Other Credible Sources (Links to an external site.) in addition to your text, formatted in APA as outlined by the Writing Center. Concept Map · Using the presentation concept map you created in Weeks 1 to 4 in the course, add the final component you worked on in Week 5. Based on the feedback you received on your concept map in the previous weeks, refine your concept map where you identify the basic components of modern computers; describe different categories of instructions, operations, operands, and number representations for a machine instruction set; interpret machine-level arithmetic operations; describe the various memory technologies and the levels of the memory hierarchy; and explain the principles and aspects related to instruction execution. The Paper Utilizing the content of your refined concept map, revise your interactive assignment initial posts from Weeks 1 through 5 in a Word document as follows: · Review the feedback from your Week 1 interactive assignment, Computer Technology and Instructions. Revise your post based on the feedback from your instructor and peers, adding any refined elements concerning the five classical computer components, performance, and the measure of computer performance. Using credible sources, research and provide an example of a computer system’s instruction set and/or operands. I honestly don't feel like I did this correctly but here goes: Explain how each of the five classical components integrate as a standard organization of a computer. The five classic components of the computer are Datapath, Control, Memory, Input and Output. The input devices and output devices are responsible for feeding information to the computer and receiving information from the computer and providing it to the user, respectively. Memory components such as Random Access Memory (RAM) and Read-Only Memory (ROM) are responsible for storing instructions and data that are needed by programs. The other two components are responsible for processing the information. Datapath is the part of the Central Processing Unit (CPU) that performs arithmetic operations and the control component is the part of the CPU that commands the datapath, memory, input, and output devices into providing desired output Define performance in general and the measure of computer performance. Computer performance can be defined by defining two widely used terms, response time and throughput. Response time talks about how fast a computer takes to complete a task. Throughput is defined as how many tasks it can complete in a certain time. There are different ways to measure computer performance, such as time spent on a program, time spent on operating system performing tasks, and the most widely known CPU execution time. In general, all of the above discussed are variants of time, which is used to measure computer performance. In your own words, summarize the instructions, operations, and operands of the computer hardware; the hardware and software interface; and the representation of instructions in computers. Instructions are used to command a computer’s operations and operands are part of the instructions that specify what data is operated on. Every unique computer architecture has its own Instruction Set Architecture ( ISA ) which talks about the operations it supports. Hardware interfaces are the physical components of a computer. They’re those components which you can touch and feel whereas software components are those which you cannot touch and feel be able to interact with using instructions that machines can interpret and perform the instruction accordingly. Representation of the instruction can be found in the ISA of that particular computer architecture. Every ISA has the type of instructions the architecture supports, the length of instructions and the format of instructions. Reference https://www.d.umn.edu/~gshute/arch/computer-components.xhtml · Review the feedback from your Week 2 interactive assignment, Arithmetic for Computers, in which you interpreted machine-level addition and subtraction operations of the arithmetic and logic unit (ALU) of the computer, multiplication and division operations, and example algorithms to perform these operations. Revise your post based on the feedback from your instructor and/or peers. You also summarized the arithmetic operations using floating-point representation. Revise your summary based on peer and/or instructor feedback Explain the addition and subtraction operations of the ALU of the computer. If we add 0 and 1 then it results in one and if we add 1 to 1 then we will get 10 which means that we can replace the digit with the zero and carry a one to the next digit. We already have to one's which will be added into the digit. Now we have 1 and with another 1 it will be carried over the next digit present after it. The subtraction is also the function of the addition, but we can swap out any of the leading 0 for another leading 1. Define multiplication and division operations and example algorithms to perform these operations. The multiplication operation uses long form multiplication in which we can multiply every digit present in one the operand with every digit present in another operand and then we can add all the results together and make sure that they are aligned in the right spots. The binary has only 0s and 1s it will be easier to compress the results where they have only 0s. And when it does not have even a single 0s then we can copy first operand as they will be multiplied by 1. Summarize the arithmetic operations using floating-point representation, and introduce the concept of sub-word parallelism for computer arithmetic. It involves usage of some small portions of the processor’s capacity so that it can perform multiple arithmetic calculations simultaneously. It means that it has become a common place where processors started to have longer word lengths so that they are able to accommodate the audio file or any other media type. The sub word parallelism is able to take the advantage of byte and half word sized data as it can partition the adder for performing multiple operations parallel. · Review the feedback from your Week 3 interactive assignment, The Processor, in which you provided an example of a pipelining approach, examined the basic implementation of a processor, and explained the functionality and interaction of datapaths. Revise your post based on the feedback from your instructor and peers, adding any elements that may enhance your initial post. Examine basic implementation of a processor that includes a subset of a core instruction set, and provide an overview of implementation. A basic implementation of instructions set including · Memory reference instructions- load word (lw) and store word(sw) · Arithmetic-logical instructions- ADD, SUB, AND, OR, SLT · Branch Equal (beq) The five basic stages for implementing instructions in simple MIPS processor 1. Instruction Fetch- Instruction in memory pointed to by PC is loaded from memory. It is read and stored in IR. PC is incremented by 4. Control signals MemRead and IRWrite are asserted. 2. Instruction Decode and Register Fetch- ALU calculates branch target address. Registers are read, R-type instructions are stored in A and B. 3. Execution, Memory Address Computation, Branch Completion- Instruction class determines datapath operation. Branch instructions are completed and others are either complete or used in next cycle. 4. Memory Access or R-Type Instruction Completion-I-Type and R-Type instructions are completed and results are stored in the appropriate registers. 5. Memory Read Completion- Data in memory register is either stored in register or written to memory. Setting requires MemtoReg=1, RegWrite is asserted and RegDst is set to 0. Explain the elements of datapaths—their functionalities and interactions—and provide an example for building a simple datapath. The hardware performing operations like registers, ALU and internal buses is a datapath. As shown in the concept map, three elements are considered · Instruction memory: Program Instructions are stored and supplied. Once program is loaded, it needs to provide only read access. · Program Counter- Holds the address of the current instruction. New value is written on every clock cycle. · Adder- Increments the PC to address of next instruction. ALU performs addition. Datapath for instruction Fetch: Reading from register file 1. Two 5-bit wide inputs for 32 registers are given to the register specifying the numbers 2. Two 32-bit wide outputs from the register are obtained with read values 3. No control is required. Explain your chosen pipelining example from your concept map that compares single-cycle with pipelined performance versus without pipelined performance. The example shows that in single cycle, one instruction is completed and then the next instruction is served. Therefore, each instruction takes 950ps approximately and two instructions complete in 1950ps. New instruction begins only after the previous one finishes thus increasing the total cycle time. However, in pipelining, first instruction completes in 1050ps. Second in 1100ps and third in 1100ps. The total cycle time for all three instructions is 1550 as shown in the diagram. This is possible since new instruction begins soon after the first stage of the previous instruction. The concept map shows that Pipelining reduces cycle time, increases throughput and makes the system reliable. However, single cycle is easier and less expensive to implement with lower instruction latency. · Review the work you completed and comments you received in the Week 4 interactive assignment, Exploiting Memory Hierarchy, in which you defined the basics of caches and measuring and improving cache performance and summarized the concepts of dependable memory hierarchy, virtual machines, and virtual memory. Revise your post based on the feedback from your instructor and peers, adding any elements that may enhance your initial post. Define the basics of caches and how to measure and improve cache performance Cache is the memory that holds data for RAM. It is faster than RAM. Cache comprises of cache blocks or cache lines. Cache is identified by size of each block, size of cache, set associativity, write policy and replacement policy. N-th block of cache is called as cache block at index n. A CPU address is decoded into three fields of cache. · Tag · Index · Offset Tag only translates the cache address into a unique CPU address. Cache address simply uses index and offset. When CPU tries to access an address and a matching cache block is found in cache, it is called cache hit and cache does not need to access RAM. If matching address is not found in cache, it is called cache miss and cache is forced to access RAM. Cache works on three principles based on the locality of program behavior. These are spatial locality, temporal locality and sequentially. Performance Optimization Cache performance can be optimized by reducing miss penalty, time to hit in the cache and reducing miss rate