A positive-feedback latch is found to have an input offset of 5 mV, noise of 0.5 mV, and hysteresis of 2 mV. A preamplifier is to be placed in front of the latch so that the resulting comparator has a...

A positive-feedback latch is found to have an input offset of 5 mV, noise of 0.5 mV, and hysteresis of 2 mV. A preamplifier is to be placed in front of the latch so that the resulting comparator has a overall input offset of no more than 3 mV, input noise of no more than 0.4 mV, and hysteresis of no more than 1 mV. Find specifications on the gain, input offset, and input-referred noise of the pre-amplifier. Design a resistively-loaded MOS differential pair to meet these specifications (under mismatch conditions). Use the 0.18-μm CMOS process in Table 1.5 and assume the following mismatch parameters: and .