(a) Draw the state transition diagram described by the VHDL of Figure Q4 (b) The VHDL of Figure Q4 is part of a digital system used to confirm the validity of a personal identification number, each...

if KEYPRESS='1' then ICOUNT := ICOUNT + 1; ISUM <= isum="" +="" data;="" present_state=""><= relax;="" elsif="" verify='1' then="" present_state=""><= report;="" present_state=""><= count;="" else="" end="" if;="" when="" relax=""> if KEYPRESS='1' then PRESENT_STATE <= relax;="" else="" end="" if;="" when="" report=""> PRESENT_STATE <= count;="" if="" (isum="1" and="" icount="4)" then="" confirm=""><='1'; end="" if;="" if="" verify='1' then="" present_state=""><= report;="" else="" present_state=""><= count;="" isum=""><="0000"; icount="" :="0000" ;="" end="" if;="" when="" others=""> PRESENT_STATE <= count;="" confirm=""><= '0';="" end="" case;="" end="" if;="" end="" process;="" end="" behavior;="" figure="" q4="" "/="">
Extracted text: (a) Draw the state transition diagram described by the VHDL of Figure Q4 (b) The VHDL of Figure Q4 is part of a digital system used to confirm the validity of a personal identification number, each keypress raising the KEYPRESS signal and placing the value of the key pressed on DATA. State the properties of a legal personal identification number. architecture behavior of confirm is type state is (COUNT, RELAX, REPORT); signal PRESENT_STATE: state; signal ISUM: UNSIGNED (3 downto 0) := "0000"; variable ICOUNT: UNSIGNED (3 downto 0) := "0000"; begin process (CLK, RESET) begin if RESET='0' then PRESENT_STATE <= count;="" confirm=""><= '0';="" elsif="" (clk'event="" and="" clk='1' )="" then="" confirm=""><= '0';="" case="" state="" is="" when="" count=""> if KEYPRESS='1' then ICOUNT := ICOUNT + 1; ISUM <= isum="" +="" data;="" present_state=""><= relax;="" elsif="" verify='1' then="" present_state=""><= report;="" present_state=""><= count;="" else="" end="" if;="" when="" relax=""> if KEYPRESS='1' then PRESENT_STATE <= relax;="" else="" end="" if;="" when="" report=""> PRESENT_STATE <= count;="" if="" (isum="1" and="" icount="4)" then="" confirm=""><='1'; end="" if;="" if="" verify='1' then="" present_state=""><= report;="" else="" present_state=""><= count;="" isum=""><="0000"; icount="" :="0000" ;="" end="" if;="" when="" others=""> PRESENT_STATE <= count;="" confirm=""><= '0';="" end="" case;="" end="" if;="" end="" process;="" end="" behavior;="" figure="">