A Direct mapped cache has a capacity of 16-word cache and a block size of 4 words. Consider the following repeating sequence of lw addresses (given in hexadecimal): 74 A0 78 38C AC 84 88 8C 7C 34 38 13C 388 18C Determine the effective miss rate if the sequence is input to the following caches, ignoring startup effects.
Already registered? Login
Not Account? Sign up
Enter your email address to reset your password
Back to Login? Click here