A CPU executes instructions at 800 MIPS. Data can be copied 64 bits at a time, with each 64-bit word copied costing six instructions. If an incoming frame has to be copied twice, how much bit rate, at...

A CPU executes instructions at 800 MIPS. Data can be copied 64 bits at a time, with each 64-bit word copied costing six instructions. If an incoming frame has to be copied twice, how much bit rate, at most, of a line can the system handle? (Assume that all instructions run at the full 800-MIPS rate.)

A frame of 1500 bytes travel through five switches along the path. Each link has a bandwidth of 100 Mbps, a length of 100 m, and a propagation speed of 2 × 10⁸
m/sec. Assuming a queuing and processing delay of 5 ms at each switch, what is the approximate end-to-end delay for this packet?