A Cortex-M based microcontroller is configured to enable three interrupts with associated priorities. Let source A be assigned priority 1 (highest), while
sources B and C be assigned, respectively, priority 3 and 6. Now consider the scenario
where interrupt from source C suspends the execution of application program and its
ISR is being executed. While its ISR is not finished yet, the interrupts from sources
A, B, and C occur and require servicing. Describe the sequence in which these interrupts will be handled by the processor until the application program is resumed. You
can assume that no further interrupts occur during this phase.
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