(a) Assuming fS in Fig. P5.48 is suffi ciently high to make the switching process appear as virtually continuous at the signal frequency, fi nd Vo as a function of V1 and V2. How would you name this circuit? (b) If fS 5 1 MHz, specify suitable values for C1 and C2 for a unity-gain frequency of 5 kHz under the constraint C1 1 C2 # 20 pF. (c) Find the magnitude and phase errors at f 5 20 kHz. (d) What happens if we change the clock phase of the upper switch so that it is fl ipped to the right while the bottom switch is fl ipped to the left, and vice versa?
Already registered? Login
Not Account? Sign up
Enter your email address to reset your password
Back to Login? Click here