) A 32-microprocessor executes the instruction in unequal five-stage instruction pipeline: FI=2ms, DI=2.5ms, CO=3ms, FO=2ms, EI=1.5ms. Draw the timing diagram for instruction pipeline operation for 10...

) A 32-microprocessor executes the instruction in unequal five-stage instruction pipeline: FI=2ms, DI=2.5ms, CO=3ms, FO=2ms, EI=1.5ms. Draw the timing diagram for instruction pipeline operation for 10 instructions program when conditional jump take place from instruction 3 to instruction 8. Mention the time duration of each stage in pipeline diagram.