Problem 1 (30 points) Suppose we need to design a circuit that has two inputs, clk and X, and produces one output bit Y. X may change every clock cycle, where the change happens at the falling edge of...

3 short Computer Organization questions on MIPS single cycle processor.


Problem 1 (30 points) Suppose we need to design a circuit that has two inputs, clk and X, and produces one output bit Y. X may change every clock cycle, where the change happens at the falling edge of the clock. The circuit samples X at every rising edge of the clock. Y should be 1 if the last 6 bits of X are “100101” from the least recent to the most recent. Please write down the names of the states as S0, S1,… , and so on, and clearly describe the meanings of each state. Please draw the state transition diagram of this circuit. Close to an arc, show X=0 or X=1. Problem 2 (30 points) Consider the MIPS ALU designed in the class. Suppose we want to implement an instruction that looks like notandor $t0, $t1, $t2, which inverts every bit in $t1 then or it with $t2. a. (6 points) What should be sent to the “a” input of the ALU ($t0 or $t1 or $t2)? a. (6 points) What should be sent to the “b” input of the ALU ($t0 or $t1 or $t2)? a. (18 points) What should the control signals be? Binvert --- [ ] CarryIn --- [ ] Operation --- [ ] Problem 3 (40 points) Consider the following data path. Please determine whether or not it supports the following instructions by marking [Y] or [N]: R-type --- [ ] lw --- [ ] sw --- [ ] beq --- [ ]