2. Translate the lines from ORG 12 to ORG 64 in Table 7.2 to binary. Microoperation None AC - AC + DR AC+0 F3 Microoperation None AC + AC O DR AC - AC Symbel NOP ADD CLRAC INCAC DRTAC DRTAR PCTAR...


2. Translate the lines from ORG 12 to ORG 64 in Table 7.2 to binary.<br>Microoperation<br>None<br>AC - AC + DR<br>AC+0<br>F3 Microoperation<br>None<br>AC + AC O DR<br>AC - AC<br>Symbel<br>NOP<br>ADD<br>CLRAC<br>INCAC<br>DRTAC<br>DRTAR<br>PCTAR<br>WRITE<br>Condition T Symbal<br>Always 1<br>DR(15)<br>AC(15)<br>AC0<br>000<br>001<br>F2<br>000<br>Microoperation<br>None<br>AC+ AC-DR<br>Symbol<br>NOP<br>Symbol<br>NOP<br>XOR<br>000<br>001<br>SUB<br>OR<br>AND<br>READ<br>ACTDR<br>INCDR<br>PCTDR<br>001<br>010<br>010<br>AC- AC V DR<br>AC- AC A DR<br>DR + MAR<br>DR + AC<br>DR+ DR +1<br>DR(0-10) + PC<br>010<br>COM<br>011<br>100<br>101<br>110<br>AC + AC +1<br>AC + DR<br>011<br>AC + shl AC<br>AC+ nhr AC<br>PC + PC +1<br>PC + AR<br>Reserved<br>SHL<br>100<br>100<br>101<br>110<br>111<br>SHR<br>AR + DR(O-10)<br>AR + PC<br>MJAR + DR<br>101<br>110<br>111<br>INCPC<br>ARTPC<br>111<br>Comments<br>Unconditional branch<br>Indirect address bit (conditional branch)<br>Sign bit of AC (conditional branch)<br>Zero value in AC (conditional branch)<br>CD<br>00<br>01<br>10<br>11<br>BR<br>00<br>Symbol Punction<br>JMP<br>CAR AD if condition T jump)<br>CAR CAR+1 condition 0<br>CAR + AD, SBR- CAR +1 if condition1 (subroutine call)<br>branch, save address<br>CAR+ CAR+1 if condition 0<br>CAR + SBR (return from subroutine)<br>CAR(2-5) - DR(11-14), CAR(0,1.6) - 0 (mapping)<br>01<br>CALL<br>10<br>RET<br>11<br>MAP<br>Table 1: From Mano's Architecture Book, table 7.1<br>

Extracted text: 2. Translate the lines from ORG 12 to ORG 64 in Table 7.2 to binary. Microoperation None AC - AC + DR AC+0 F3 Microoperation None AC + AC O DR AC - AC Symbel NOP ADD CLRAC INCAC DRTAC DRTAR PCTAR WRITE Condition T Symbal Always 1 DR(15) AC(15) AC0 000 001 F2 000 Microoperation None AC+ AC-DR Symbol NOP Symbol NOP XOR 000 001 SUB OR AND READ ACTDR INCDR PCTDR 001 010 010 AC- AC V DR AC- AC A DR DR + MAR DR + AC DR+ DR +1 DR(0-10) + PC 010 COM 011 100 101 110 AC + AC +1 AC + DR 011 AC + shl AC AC+ nhr AC PC + PC +1 PC + AR Reserved SHL 100 100 101 110 111 SHR AR + DR(O-10) AR + PC MJAR + DR 101 110 111 INCPC ARTPC 111 Comments Unconditional branch Indirect address bit (conditional branch) Sign bit of AC (conditional branch) Zero value in AC (conditional branch) CD 00 01 10 11 BR 00 Symbol Punction JMP CAR AD if condition T jump) CAR CAR+1 condition 0 CAR + AD, SBR- CAR +1 if condition1 (subroutine call) branch, save address CAR+ CAR+1 if condition 0 CAR + SBR (return from subroutine) CAR(2-5) - DR(11-14), CAR(0,1.6) - 0 (mapping) 01 CALL 10 RET 11 MAP Table 1: From Mano's Architecture Book, table 7.1
5UU<br>-UUU<br>CD<br>BR<br>AD<br>Mlcrooperations<br>ORG O<br>Label<br>dON<br>READ<br>INDRCT<br>NEXT<br>FETCH<br>JMP<br>ADD:<br>JMP<br>ADD<br>ORG 4<br>JMP<br>OVER<br>dON<br>NOP<br>BRANCH:<br>JMP<br>CALL<br>FETCH<br>INDRCT<br>NOP<br>OVER:<br>JMP<br>FETCH<br>ARTPC<br>ORG 8<br>NOP<br>ACTDR<br>INDRCT<br>STORE:<br>NEXT<br>РЕТCH<br>JMP<br>WRITE<br>JMP<br>ORG 12<br>NOP<br>READ<br>CALL<br>INDRCT<br>NEXT<br>NEXT<br>FETCH<br>EXCHANGE:<br>JMP<br>ACTDR, DRTAC<br>WRITE<br>ORG 64<br>PCTAR<br>READ, INCPC<br>DRTAR<br>JMP<br>JMP<br>FETCH:<br>NEXT<br>NEXT<br>JMP<br>JMP<br>MAP<br>JMP<br>RET<br>INDRCT:<br>READ<br>DRTAR<br>NEXT<br>Table 2: From Mano's Architecture Book, table 7.2<br>Remember that the instruction format is:<br>I (bit 15), opcode (bits 14..11), and address (bits 10.0).<br>Contrud unic<br>Figure 74 Computer hanbearc sreliga<br>Figure 1: From Mano's Architecture Book, fig. 74<br>2.<br>llmail.google.com/mail/u/0/#inbox?projector=D1<br>

Extracted text: 5UU -UUU CD BR AD Mlcrooperations ORG O Label dON READ INDRCT NEXT FETCH JMP ADD: JMP ADD ORG 4 JMP OVER dON NOP BRANCH: JMP CALL FETCH INDRCT NOP OVER: JMP FETCH ARTPC ORG 8 NOP ACTDR INDRCT STORE: NEXT РЕТCH JMP WRITE JMP ORG 12 NOP READ CALL INDRCT NEXT NEXT FETCH EXCHANGE: JMP ACTDR, DRTAC WRITE ORG 64 PCTAR READ, INCPC DRTAR JMP JMP FETCH: NEXT NEXT JMP JMP MAP JMP RET INDRCT: READ DRTAR NEXT Table 2: From Mano's Architecture Book, table 7.2 Remember that the instruction format is: I (bit 15), opcode (bits 14..11), and address (bits 10.0). Contrud unic Figure 74 Computer hanbearc sreliga Figure 1: From Mano's Architecture Book, fig. 74 2. llmail.google.com/mail/u/0/#inbox?projector=D1
Jun 08, 2022
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