122 Chapter 3 Gate-Level Minimization 3.35* Find the syntax errors in the following declarations (note that names for primitive gates are optional): module Exmpl-3(A, B, C, D, F) inputs output and //...

Extracted text: 122 Chapter 3 Gate-Level Minimization 3.35* Find the syntax errors in the following declarations (note that names for primitive gates are optional): module Exmpl-3(A, B, C, D, F) inputs output and // Line 1 I/ Line 2 // Line 3 // Line 4 I/ Line 5 I/ Line 6 // Line 7 A, B, C, Output D, F, В g1(А, В, D); (D, A, C), (F, B; C); not OR endmodule;