1. Suppose the memory cells at addresses F0 to F9 in the machine described in Appendix C contain the (hexadecimal) bit patterns described in the following table: Address Contents F0 20 F1 C0 F2 30 F3...

1.
Suppose the memory cells at addresses F0 to F9 in the machine described in Appendix C contain the (hexadecimal) bit patterns described in the following table:

Address Contents

F0 20

F1 C0

F2 30

F3 F8

F4 20

F5 00

F6 30

F7 F9

F8 FF

F9 FF

If we start the machine with its program counter containing F0, what does the machine do when it reaches the instruction at address F8?