1. CPU with 2ns clock, hit time = 1 cycle, miss penalty = 40 cycles, cache hit rate = 90% AMAT = ___ ns.? 2. A memory system with cache memory has an 8-bit word address. Each memory block (or cache...

1. CPU with 2ns clock, hit time = 1 cycle, miss penalty = 40 cycles, cache hit rate = 90%

AMAT = ___ ns.?

2. A memory system with cache memory has an 8-bit word address.  Each memory block (or cache line) consists of 4 words.  How many bits are used for the word offset in an address?

3. A memory system with cache memory has an 8-bit word address.  The direct-mapped mapping technique is used.  The cache memory has 8 cache blocks.  How many bits are used for the block index field in an address?